Ubume bophando lwesekethe edibeneyo yeSiC

Ukwahluka kwizixhobo ze-S1C ezidityanisiweyo ezilandela amandla ombane aphezulu, amandla aphezulu, ukuphindaphindwa okuphezulu kunye neempawu zobushushu obuphezulu, injongo yophando yesekethe edibeneyo ye-SiC kukufumana ubushushu obuphezulu besekethe yedijithali yesekethe yolawulo olukrelekrele lwe-ICs. Njengoko i-SiC yesekethe edibeneyo yentsimi yombane yangaphakathi iphantsi kakhulu, ngoko ke impembelelo yesiphene se-microtubules iya kuncipha kakhulu, eli liqhekeza lokuqala le-monolithic SiC edibeneyo yokusebenza ye-amplifier chip yaqinisekiswa, imveliso yangempela egqityiweyo kwaye igqitywe yimveliso iphezulu kakhulu. ngaphezu microtubules iziphene, ngoko ke, ngokusekelwe SiC imodeli isivuno kunye Si kunye CaAs izinto ngokucacileyo ezahlukeneyo. Itshiphu isekwe kwitekhnoloji ye-NMOSFET yokuphela. Esona sizathu sikukuba ukushukumiseka okusebenzayo komthuthi we-reverse channel SiC MOSFETs kuphantsi kakhulu. Ukuze kuphuculwe ukuhamba komhlaba kweSic, kuyimfuneko ukuphucula kunye nokwandisa inkqubo ye-thermal oxidation yeSic.

IYunivesithi yasePurdue yenze umsebenzi omninzi kwiisekethe ezidibeneyo zeSiC. Kwi-1992, i-factory yaphuhliswa ngempumelelo ngokusekelwe kwi-channel ye-reverse 6H-SIC NMOSFETs isekethe edibeneyo yedijithali ye-monolithic. I-chip iqulethe kwaye ingabi yisango, okanye isango, okanye isango, i-binary counter, kunye ne-half adder circuits kwaye inokusebenza ngokufanelekileyo kuluhlu lwamaqondo obushushu angama-25 ° C ukuya kuma-300 ° C. Ngo-1995, inqwelomoya yokuqala ye-SiC i-MESFET Ics yenziwa kusetyenziswa iteknoloji yokuhlukanisa inaliti ye-vanadium. Ngokulawula ngokuchanekileyo inani le-vanadium injected, i-SiC ekhuselayo inokufumaneka.

Kwiisekethe zedijithali, iisekethe zeCMOS zinomtsalane ngakumbi kuneesekethe ze-NMOS. NgoSeptemba 1996, isekethe yokuqala edibeneyo yedijithali ye-6H-SIC CMOS yenziwa. Isixhobo sisebenzisa i-N-odolo etofweyo kunye ne-deposition oxide layer, kodwa ngenxa yezinye iingxaki zenkqubo, i-chip PMOSFETs threshold voltage iphezulu kakhulu. NgoMatshi 1997 xa kuveliswa isizukulwana sesibini sesekethe yeSiC CMOS. Itekhnoloji yokufaka i-P trap kunye ne-thermal growth oxide layer yamkelwa. I-voltage ye-threshold ye-PMOSEFTs efunyenwe ngokuphuculwa kwenkqubo malunga ne -4.5V. Zonke iisekethe kwi-chip zisebenza kakuhle kwiqondo lokushisa ukuya kwi-300 ° C kwaye zinikwe amandla ombane omnye, onokuthi ube naphi na ukusuka kwi-5 ukuya kwi-15V.

Ngokuphuculwa komgangatho we-wafer we-substrate, iisekethe ezidibeneyo ezisebenzayo kunye nemveliso ephezulu ziya kwenziwa. Nangona kunjalo, xa izinto ze-SiC kunye neengxaki zenkqubo zisonjululwe ngokusisiseko, ukuthembeka kwesixhobo kunye nephakheji kuya kuba yinto ephambili echaphazela ukusebenza kweesekethe ezidibeneyo ze-SiC ezinobushushu obuphezulu.


Ixesha lokuposa: Aug-23-2022
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